Eeschema Chapter9 JA

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Create a Netlist



  • コンポーネントのリスト
  • 等電位ネットというコンポーネント間の接続のリスト。


  • PCBソフトウェア。
  • 回路およびPCBシミュレータ。
  • CPLD (および他のプログラマブルICの)コンパイラ


  • PCBNEWフォーマット(プリント配線)。
  • ORCAD PCB2フォーマット(プリント配線)。
  • CADSTARフォーマット(プリント配線)。
  • 様々なシミュレータ用のSpiceフォーマット(Spiceフォーマットは他のシミュレータにも使用される)。



[[Image:]] Pcbnewを選択
[[Image:]] Spiceを選択



Netlist Examples

You can see below a schematic design using the PSPICE library.


Example of a PCBNEW netlist file.

# EESchema Netlist Version 1.0 generee le 21/1/1997-16:51:15
(32E35B76 $noname C2 1NF {Lib=C}
(1 0)
(2 VOUT_1)
(32CFC454 $noname V2 AC_0.1 {Lib=VSOURCE}
(1 N-000003)
(2 0)
(32CFC413 $noname C1 1UF {Lib=C}
(1 INPUT_1)
(2 N-000003)
(32CFC337 $noname V1 DC_12V {Lib=VSOURCE}
(1 +12V)
(2 0)
(32CFC293 $noname R2 10K {Lib=R}
(1 INPUT_1)
(2 0)
(32CFC288 $noname R6 22K {Lib=R}
(1 +12V)
(2 INPUT_1)
(32CFC27F $noname R5 22K {Lib=R}
(1 +12V)
(2 N-000008)
(32CFC277 $noname R1 10K {Lib=R}
(1 N-000008)
(2 0)
(32CFC25A $noname R7 470 {Lib=R}
(1 EMET_1)
(2 0)
(32CFC254 $noname R4 1K {Lib=R}
(1 +12V)
(2 VOUT_1)
(32CFC24C $noname R3 1K {Lib=R}
(1 +12V)
(2 N-000006)
(32CFC230 $noname Q2 Q2N2222 {Lib=NPN}
(1 VOUT_1)
(2 N-000008)
(3 EMET_1)
(32CFC227 $noname Q1 Q2N2222 {Lib=NPN}
(1 N-000006)
(2 INPUT_1)
(3 EMET_1)
# End

In PSPICE format, the netlist is as follows.

* EESchema Netlist Version 1.1 (Spice format) creation date: 18/6/2008-08:38:03
.model Q2N2222 npn (bf=200)
.AC 10 1Meg *1.2
.DC V1 10 12 0.5
R12  /VOUT N-000003 22K
R11  +12V N-000003 100
L1  N-000003 /VOUT 100mH
R10  N-000005 N-000004 220
C3  N-000005 0 10uF
C2  N-000009 0 1nF
R8  N-000004 0 2.2K
Q3  /VOUT N-000009 N-000004 N-000004 Q2N2222
V2  N-000008 0 AC 0.1
C1  /VIN N-000008 1UF
V1  +12V 0 DC 12V
R2  /VIN 0 10K
R6  +12V /VIN 22K
R5  +12V N-000012 22K
R1  N-000012 0 10K
R7  N-000007 0 470
R4  +12V N-000009 1K
R3  +12V N-000010 1K
Q2  N-000009 N-000012 N-000007 N-000007 Q2N2222
Q1  N-000010 /VIN N-000007 N-000007 Q2N2222
.print ac v(vout)
.plot ac v(nodes) (-1,5)


Netlist Name Precautions

Many software tools that use netlists do not accept spaces in the component names, pins, equipotentials or others. Systematically avoid spaces in labels, or names and value fields of components or their pins.

In the same way, special characters other than letters and numbers can induce problems. Note that this limitation is not related to Eeschema, but to the netlist formats that can then become not translatable to softwares that use netlist files.

PSPICE netlists

For the Pspice simulator, you have to include some command lines in the netlist itself (.PROBE, .AC, etc.).

Any text line included in the schematic diagram starting with the keyword -pspice or -gnucap will be inserted (without the keyword) at the top of the netlist.

Any text line included in the schematic diagram starting with the keyword +pspice or +gnucap will be inserted (without the keyword) at the end of the netlist.

Here is a sample using many one line texts and one multi-line text.


For example: if you type the following text (do not use a label!):


a line .PROBE will be inserted in the netlist.

In the previous example three lines were inserted at the beginning of the netlist and two at the end with this technique.

If you are using multiline texts, +pspice or +gnucap keywords are needed only once:


.model PNP PNP

.lib C:\Program Files\LTC\LTspiceIV\lib\cmp\standard.bjt


creates the four lines:

.model NPN NPN

.model PNP PNP

.lib C:\Program Files\LTC\LTspiceIV\lib\cmp\standard.bjt


Also note that the equipotential GND must be named 0 (zero) for Pspice.

Other formats, using «plugins»

For other netlist formats you can add netlist converters. These converters are automatically launched by Eeschema. Chapter 14 gives some explanations and examples of converters.

A converter is a text file (xsl format) but one can use other languages like Python. When using the xsl format, a tool ( xsltproc.exe or xsltproc ) read the intermediate file created by Eeschema, and the converter file to create the output file. In this case, the converter file (a sheet style) is very small and very easy to write.

Init the dialog window

You can add a new netlist plug-in via the Add Plugin tab.


Here is the plug-in PadsPcb setup window


The setup will require:

  • A title (for instance: the name of the netlist format).
  • The plug-in to launch.

When the netlist is generated:

  1. Eeschema creates an intermediate file *.tmp, for instance test.tmp.
  2. Eeschema run the plug-in, which reads test.tmp and creates

Command line format

Here is an example, using xsltproc.exe as tool to convert .xsl files, and a file netlist_form_pads-pcb.xsl as converter sheet style:

f:/kicad/bin/xsltproc.exe -o f:/kicad/bin/plugins/netlist_form_pads-pcb.xsl %I


f:/kicad/bin/xsltproc.exe A tool to read and convert xsl file
-o Output file: %O will define the output file.
f:/kicad/bin/plugins/netlist_form_pads-pcb.xsl File name converter (a sheet style, xsl format).
%I Will be replaced by the intermediate file created by Eeschema (*.tmp).

For a schematic named test.sch, the actual command line is:

f:/kicad/bin/xsltproc.exe -o f:/kicad/bin/plugins/netlist_form_pads-pcb.xsl test.tmp.

Converter and sheet style (plug in)

This is a very simple piece of software, because its purpose is only to convert an input text file (the intermediate text file) to an other text file. Moreover, from the intermediate text file, you can create a BOM list.

When using xsltproc as converter tool only the sheet style will be generated.

Intermediate netlist file format

See Chapter 14 for more explanations about xslproc, the descriptions of intermediate file format, and some examples of sheet style for converters.